Design Engineer ( RTL / DFT/ FPGA) in ST ERICSSON

Design Engineer ( RTL / DFT/ FPGA)
Joining Location :Bangalore
Education : B.E/B.tech/M.E/M.Tech

Mandatory Requirment:
Only Tier1 and Tier2 institutions and RVCE, PESIT, SJCE/NIE Mysore
CGPA >= 8.0 or Percentage > 80% except for few institutions
Masters Degree preferred but can take BTech – with only E&C branch

Thanks and Regards
Rajesh Kumar Singh

ST-Ericsson
Plot No. I, Knowledge park III, Greater Noida
201308 ,UP ( India )
Office: +91 120 2352900
Mobile: +91 9560056775

Company Profile
T-Ericsson is a 50/50 joint venture created by bringing together
ST-NXP Wireless and Ericsson Mobile Platforms, two of the world's leading wirelesssemiconductor and platform companies, both with strong industry heritage. Pre-merger, the businesses individually generated combined pro-forma revenues of about US$3.6bn in 2008, placing ST-Ericsson among the top players in wireless semiconductors.

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